The present invention relates generally to integrated circuits and, more particularly, to integrated circuits incorporating a spread-spectrum clock (SSC) generator.
An SSC generator modulates, or dithers, the frequency of its generated output SSC signal over a range of frequencies to lower the peak energy contained in the output SSC signal and, concomitantly, lower the clock-generated electromagnetic interference from both the fundamental clock frequency and harmonic frequencies.
In some SSC generators, a controllable delay circuit is used to delay an input clock signal. A control unit performs statistical analyses of the output SSC signal relative to the timing of the input clock signal and generates a control signal that is provided to the controllable delay circuit to vary the delay applied to the input clock signal. These SSC generators can have a relatively high signal-to-noise ratio (SNR) and relatively slow convergence. Accordingly, it would be advantageous to have an SSC generator that can be operated with lower SNR and faster convergence.